Get the last reset reason
Sometimes it is helpful to know the last reset reason (for logging, debugging, …)
Code example (courtesy of copercini)
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/* * Print last reset reason of ESP32 * ================================= * * Use either of the methods print_reset_reason * or verbose_print_reset_reason to display the * cause for the last reset of this device. * * Public Domain License. * * Author: * Evandro Luis Copercini - 2017 */ #include <rom/rtc.h> #define uS_TO_S_FACTOR 1000000 /* Conversion factor for micro seconds to seconds */ void print_reset_reason(RESET_REASON reason) { switch ( reason) { case 1 : Serial.println ("POWERON_RESET");break; /** 1, Vbat power on reset*/ case 3 : Serial.println ("SW_RESET");break; /** 3, Software reset digital core*/ case 4 : Serial.println ("OWDT_RESET");break; /** 4, Legacy watch dog reset digital core*/ case 5 : Serial.println ("DEEPSLEEP_RESET");break; /** 5, Deep Sleep reset digital core*/ case 6 : Serial.println ("SDIO_RESET");break; /** 6, Reset by SLC module, reset digital core*/ case 7 : Serial.println ("TG0WDT_SYS_RESET");break; /** 7, Timer Group0 Watch dog reset digital core*/ case 8 : Serial.println ("TG1WDT_SYS_RESET");break; /** 8, Timer Group1 Watch dog reset digital core*/ case 9 : Serial.println ("RTCWDT_SYS_RESET");break; /** 9, RTC Watch dog Reset digital core*/ case 10 : Serial.println ("INTRUSION_RESET");break; /** 10, Instrusion tested to reset CPU*/ case 11 : Serial.println ("TGWDT_CPU_RESET");break; /** 11, Time Group reset CPU*/ case 12 : Serial.println ("SW_CPU_RESET");break; /** 12, Software reset CPU*/ case 13 : Serial.println ("RTCWDT_CPU_RESET");break; /** 13, RTC Watch dog Reset CPU*/ case 14 : Serial.println ("EXT_CPU_RESET");break; /** 14, for APP CPU, reseted by PRO CPU*/ case 15 : Serial.println ("RTCWDT_BROWN_OUT_RESET");break;/** 15, Reset when the vdd voltage is not stable*/ case 16 : Serial.println ("RTCWDT_RTC_RESET");break; /** 16, RTC Watch dog reset digital core and rtc module*/ default : Serial.println ("NO_MEAN"); } } void verbose_print_reset_reason(RESET_REASON reason) { switch ( reason) { case 1 : Serial.println ("Vbat power on reset");break; case 3 : Serial.println ("Software reset digital core");break; case 4 : Serial.println ("Legacy watch dog reset digital core");break; case 5 : Serial.println ("Deep Sleep reset digital core");break; case 6 : Serial.println ("Reset by SLC module, reset digital core");break; case 7 : Serial.println ("Timer Group0 Watch dog reset digital core");break; case 8 : Serial.println ("Timer Group1 Watch dog reset digital core");break; case 9 : Serial.println ("RTC Watch dog Reset digital core");break; case 10 : Serial.println ("Instrusion tested to reset CPU");break; case 11 : Serial.println ("Time Group reset CPU");break; case 12 : Serial.println ("Software reset CPU");break; case 13 : Serial.println ("RTC Watch dog Reset CPU");break; case 14 : Serial.println ("for APP CPU, reseted by PRO CPU");break; case 15 : Serial.println ("Reset when the vdd voltage is not stable");break; case 16 : Serial.println ("RTC Watch dog reset digital core and rtc module");break; default : Serial.println ("NO_MEAN"); } } void setup() { // put your setup code here, to run once: Serial.begin(115200); delay(2000); Serial.println("CPU0 reset reason:"); print_reset_reason(rtc_get_reset_reason(0)); verbose_print_reset_reason(rtc_get_reset_reason(0)); Serial.println("CPU1 reset reason:"); print_reset_reason(rtc_get_reset_reason(1)); verbose_print_reset_reason(rtc_get_reset_reason(1)); // Set ESP32 to go to deep sleep to see a variation // in the reset reason. Device will sleep for 5 seconds. esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_OFF); Serial.println("Going to sleep"); esp_deep_sleep(5 * uS_TO_S_FACTOR); } void loop() { // put your main code here, to run repeatedly: } |
Example Serial Log:
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rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0x00 clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:1 load:0x3fff0008,len:8 load:0x3fff0010,len:160 load:0x40078000,len:10632 load:0x40080000,len:252 entry 0x40080034 CPU0 reset reason: RTCWDT_RTC_RESET RTC Watch dog reset digital core and rtc module CPU1 reset reason: EXT_CPU_RESET for APP CPU, reseted by PRO CPU Going to sleep ets Jun 8 2016 00:22:57 rst:0x5 (DEEPSLEEP_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0x00 clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:1 load:0x3fff0008,len:8 load:0x3fff0010,len:160 load:0x40078000,len:10632 load:0x40080000,len:252 entry 0x40080034 CPU0 reset reason: DEEPSLEEP_RESET Deep Sleep reset digital core CPU1 reset reason: EXT_CPU_RESET for APP CPU, reseted by PRO CPU Going to sleep ets Jun 8 2016 00:22:57 rst:0x5 (DEEPSLEEP_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0x00 clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:1 load:0x3fff0008,len:8 load:0x3fff0010,len:160 load:0x40078000,len:10632 load:0x40080000,len:252 entry 0x40080034 CPU0 reset reason: DEEPSLEEP_RESET Deep Sleep reset digital core CPU1 reset reason: EXT_CPU_RESET for APP CPU, reseted by PRO CPU Going to sleep |
